Digital Photo Keychain User Manual

EXCEPTION PROCESSING STATE (INTERRUPT PROCESSING)
7 - 32 PROCESSING STATES MOTOROLA
ii1
MAIN
PROGRAM
n1
n2
iin
RTI
FAST INTERRUPT
VECTOR
LONG INTERRUPT
SUBROUTINE
JSR
ii3
ii4
ii5
ii6
(a) Instruction Fetches from Memory
INTERRUPT CONTROL CYCLE 1
i
INTERRUPT CONTROL CYCLE 2
i
FETCH
n1 ii1 JSR — ii3 ii4 ii5 iin RTI — n2
DECODE
n1 ii1 JSR NOP ii3 ii4 ii5 ii6 iin RTI NOP n2
EXECUTE
n1 ii1 JSR NOP ii3 ii4 ii5 ii6 iin RTI NOP n2
INSTRUCTION CYCLE COUNT
123 4 5 6 7 8 9 101112131415
i = INTERRUPT
ii = INTERRUPT INSTRUCTION WORD
n = NORMAL INSTRUCTION WORD
INTERRUPT SYNCHRONIZED AND
RECOGNIZED AS PENDING
INTERRUPTS RE-ENABLED
(b) Program Controller Pipeline
Figure 7-12 JSR Second Instruction of a Fast Interrupt