User's Manual

24 68P80801H45-1 1/20/2002
Base Radio Controllers EBTS System Manual - Vol 2
900 MHz QUAD Channel Base Radio Controller
conditions coexist: (1) The 5 MHz tests stable. (2) The PLL IC is programmed. (3)
Two PLL oscillator and reference signal output alignments occur.
When the gate enables, the control voltage from the PLL can adjust the
high-stability VCXO frequency. The adjustment can achieve a stability nearly
equivalent to that of the external, 5 MHz frequency reference.
The correction voltage from the PLL continuously adjusts the VXCO frequency.
The VXCO outputs a 16.8 MHz clock signal. The circuit applies this clock signal to
the receiver, 48 MHz reference and TISIC.
The receivers use the 16.8MHz as the clock input and synthesizer reference.
The 48 MHz EXBRC synthesizer uses the 16.8 MHz as its synthesizer reference.
The 48 MHz synthesizer output is the clock input for the TXDSP I and Q data
reclock circuitry.
The TISIC divides the 16.8 MHz signal by seven, and outputs a 2.4 MHz signal.
This output signal then becomes the 2.4 MHz reference for the Exciter.
Input Ports
One general-purpose input register provides for BRC and station circuit input
signals. The register has 16 input ports. The Host Data Bus conveys input register
data to the Host Microprocessor. Typical inputs include 16.8 and 48 MHz Station
Reference Circuitry status outputs and reset status outputs.
Output Ports
Two general-purpose output registers distribute control signals from the Host
Microprocessor to the BRC and station circuitry. One register has 32 output ports
and the other register has 8 output ports. Control signal distribution occurs over
the backplane. The Host Data Bus drives the output ports’ latched outputs.
Typical control signals include front-panel LED signals and SPI peripheral enable
and address lines.
Remote Station Shutdown
The BRC contains power supply shutdown circuitry. This circuitry can send a
shutdown pulse to the Base Radio Power Supply. BRC software generates the
shutdown control pulse.
After receiving a shutdown pulse, the power supply turns off BR power. Shut
down power sources include 3.3, 28.6 and 14.2 Vdc sources throughout the BR.
Due to charges retained by BR storage elements, power supply voltages may not
reach zero. The shutdown only assures that the host processor enters a
power-on-reset state.
A remote site uses the shutdown function to perform a hard reset of all BR
modules.