User's Manual

68P80801E35-B 5/1/2002 27
EBTS System Manual - Vol 2 800/900/1500 MHz Base Radios
Base Radio Overview
POWER AMPLIFIER MODULE
TO/FROM
ETHERNET
ENHANCED
BASE RADIO CONTROLLER
MODULE
EXCITER MODULE
DC POWER SUPPLY MODULE
SERIAL BUS
TO/FROM
STATUS
PORT
(RS-232)
16.8 MHZ
5 MHZ
SPI BUS
5 MHZ
EXTERNAL
REFERENCE
FINAL
LINEAR
AMPS
SPLITTER
LINEAR
DRIVER
ADDRESS DECODE,
MEMORY, A/D CONVERTER
ADDRESS DECODE,
MEMORY, A/D CONVERTER
FROM
RFDS
(RECEIVER
ANTENNA)
#3
3X RECEIVER MODULE
MIXER
DSP BUS
LPF/
PRESELECT/
PREAMP/
IMAGE FILTER
VCO/
SYNTH
ADDRESS DECODE,
MEMORY,
A/D CONVERTER
PLL/
VCO
SPI BUS
2.1 MHZ
COMBINER
LINEAR RF
AMPLIFIER
EXCITER
IC
IF IN IF OUT
TRANLIN
IC
INPUT FILTER
BOARD
CLOCK
GENERATOR
CIRCUITRY
START-UP
INVERTER
CIRCUITRY
133 KHZ
267 KHZ
+14.2 V
INVERTER
CIRCUITRY
133 KHZ
DIAGNOSTICS
CIRCUITRY
+14.2 VDC
TO BACKPLANE
+5 VDC
TO BACKPLANE
+28 VDC
TO BACKPLANE
EXTERNAL
DC INPUT
41 - 60 VDC
RF OUT
SPI BUS
SPI BUS
SPI BUS
SPI BUS
2.1 MHZ
SPI BUS
DATA/CLOCK
DATA/CLOCK
RF IN
RF OUT
RF FEEDBACK
FEEDBACK IN
DIGITAL
ATTEN.
CIRCUIT
AGC
SPI BUS
RF IN
CUSTOM
RECEIVER
IC
EBTS284
053001JNM
TO
RFDS
(TRANSMIT
ANTENNA)
MAIN INVERTER
CIRCUITRY
+5 V
INVERTER
CIRCUITRY
FROM
RFDS
(RECEIVER
ANTENNA)
#2
MIXER
DSP BUS
LPF/
PRESELECT/
PREAMP/
IMAGE FILTER
RF IN
DIGITAL
ATTEN.
CIRCUIT
CUSTOM
RECEIVER
IC
FROM
RFDS
(RECEIVER
ANTENNA)
#1
MIXER
DSP BUS
LPF/
PRESELECT/
PREAMP/
IMAGE FILTER
RF IN
DIGITAL
ATTEN.
CIRCUIT
CUSTOM
RECEIVER
IC
BAND
PASS
FILTER
BAND
PASS
FILTER
BAND
PASS
FILTER
IF
AMP
IF
AMP
IF
AMP
BAND
PASS
FILTER
BAND
PASS
FILTER
BAND
PASS
FILTER
3-WAY
SPLITTER
NOTES:
1. 2-Branch systems must have a 50Ω load (P/N 5882106P03) installed on Antenna Port #3.
2. Set the RX_FRU_CONFIG parameter as follows:
2-Branch Systems: 12
3-Branch Systems: 123
3. Where two frequencies are given, frequency without parentheses applies to 800 MHz BR only and frequency with parentheses applies to 900 MHz BR only.
970 MHZ
(1025 MHZ)
VCO/SYNTH
FREQUENCY
DOUBLER
237 MHZ
(180.6 MHZ)
VCO
SDRAM
IO
LATCHES
EEPROMFLASHBUFFERS
HOST
µ P
ETHERNET
INTERFACE
RECEIVE
DSP
TRANSMIT
DSP
TISIC
1PPS &
SLOT
TIMING
Figure 5
Generation 2 Single Channel 800 MHz Base Radio Functional Block Diagram