Service manual
- 8 Channel 8 bit A/D
- PA high end regulator
- Real Time Clock ( RTC )
The detail applications for this chip in Taichi can be found in GSM block
diagram.
7.2.2 PDA Control Logic
PDA logic mainly provides the interface control functions for Taichi radio.
DragonBall is the core chip which fetchs executive code from external flash
memory through data bus and address bus.
DragonBall introduced by Motorola as the newest member of the DragonBall’s
Series of MC68328 family.
Inherited the display capability of the original DragonBall’s processor, the
MC68EZ328 features a more flexible LCD controller with streamlined list of
peripherals placed in a smaller package. This processor mainly targeted for
portable consumer products which require less peripherals and a more flexible
LCD controller. By providing 3V, fully static operation in an efficient 100 TQFP
package, the MC68EZ328 delivers cost-effective performance to satisfy the
extensive requirements of today's portable consumer market.
DragonBall has the following features:
• Static 68EC000 Core Processor-Identical to MC68EC000
Microprocessor
1. Full Compatibility with MC68000 and MC68EC000
2. 32-Bit internal address bus
3. 24-Bit external address bus capable of addressing maximum 4 x 16MB
blocks with chip selects CSA, CSB and 4 x 4 MB blocks with chip
selects CSC, CSD.
4. 16-Bit on-chip data bus for MC68000 bus operations
5. Static design allows processor clock to be stopped to provide power
savings
6. 2.7 MIPS Performance at 16.58 MHz processor clock
7. External M68000 Bus interface with selectable bus sizing for 8-bit and
16-bit data ports
• System Integration Module (SIM28-EZ), Incorporating Many
Functions Typically Related to External Array Logic, such as:
1. System configuration, programmable address mapping
2. Glueless interface to SRAM, EPROM, FLASH memory
3. 8 programmable chip selects with wait state generation logic
4. 4 programmable interrupt I/O and with keyboard interrupt capability
5. 5 general purpose, programmable edge/level/polarity interrupt IRQ
6. Other programmable I/O, multiplexed with peripheral functions up to 47
parallel I/O
7. Programmable interrupt vector response for on-chip peripheral