Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide 95
Distance from Intel
®
82562ET to Magnetics Module
Distance B should also be designed to be less than 1” between devices. The high-speed nature of the
signals propagating through these traces requires that the distance between these components be closely
observed. In general, any section of traces intended for use with high-speed signals should be subject to
proper termination practices. Proper termination of signals can reduce reflections caused by impedance
mismatches between device and traces. The reflections of a signal may have a high-frequency component
that contributes more EMI than the original signal itself. For this reason, these traces should be designed
to a 100-Ω differential value. These traces should also be symmetric and of equal length within each
differential pair.
3.21.4.5. Reducing Circuit Inductance
The following guidelines show how to reduce circuit inductance in both backplanes and motherboards.
Traces should be routed over a continuous ground plane with no interruptions. If there are vacant areas
on a ground or power plane, the signal conductors should not cross the vacant area. This increases
inductance and associated radiated noise levels. Noisy logic grounds should be separated from analog
signal grounds to reduce coupling. Noisy logic grounds can sometimes affect sensitive DC subsystems,
such as analog-to-digital conversion, operational amplifiers, etc. All ground vias should be connected to
every ground plane. Similarly, every power via should be connected to all power planes at equal
potential. This helps reduce circuit inductance. Another recommendation is to physically locate grounds
so as to minimize the loop area between a signal path and its return path. Rise and fall times should be as
slow as possible. Because signals with fast rise and fall times contain many high-frequency harmonics,
they can radiate significantly. The most sensitive signal returns closest to the chassis ground should be
connected together. This will result in a smaller loop area and reduce the likelihood of crosstalk. The
effect of different configurations on the amount of crosstalk can be studied using electronics modeling
software.
Terminating Unused Connections
In Ethernet designs, it is common practice to terminate to ground both unused connections on the RJ45
connector and the magnetics module. Depending on the overall shielding and grounding design, this may
be done to the chassis ground, signal ground or a termination plane. Care must be taken when using
various grounding methods to ensure that emission requirements are met. The method most often
implemented is called the “Bob Smith” termination. In this method, a floating termination plane is cut out
of a power plane layer. This floating plane acts as a plate of a capacitor with an adjacent ground plane.
The signals can be routed through 75-Ω resistors to the plane. Stray energy on unused pins is then carried
to the plane.
Termination Plane Capacitance
The recommended minimum termination plane capacitance is 1500 pF. This helps reduce the amount of
crosstalk on the differential pairs (TDP/TDN and RDP/RDN) from the unused pairs of the RJ45. Pads
may be placed for an additional capacitance to chassis ground, which may be required if the termplane
capacitance is not large enough to pass EFT (electrical fast transient) testing. If a discrete capacitor is
used, it should be rated for at least 1000 Vac, to satisfy the EFT requirements.