Specifications
Intel
®
810E2 Chipset Platform
R
Design Guide 87
3.21.2.4. Common Physical Layout Issues
Common physical layer design and layout mistakes in LAN on Motherboard designs are as follows:
1. Unequal length of the two traces within a differential pair. Inequalities create common-mode noise
and distort transmit or receive waveforms.
2. Lack of symmetry between the two traces within a differential pair. (For each component and/or
via that one trace encounters, the other trace must encounter the same component or a via at the
same distance from the PLC.) Asymmetry can create common-mode noise, and distort the
waveforms.
3. Excessive distance between the PLC and the magnetics or between the magnetics and the RJ-45/11
connector. Beyond a total distance of about 4 inches, it can become extremely difficult to design a
specification-compliant LAN product. Long traces on FR4 (fiberglass epoxy substrate) will
attenuate the analog signals. Also any impedance mismatch in the traces will be aggravated if they
are longer (see #9 below). The magnetics should be as close to the connector as possible
(≤1 inch).
4. Routing any other trace parallel to and close to one of the differential traces. Crosstalk on the
receive channel will induce degraded long-cable BER. When crosstalk gets onto the transmit
channel, it can cause excessive emissions (below the FCC standard) and can cause poor transmit
BER on long cables. Other signals should be kept at least 0.3” from the differential traces.
5. Routing the transmit differential traces next to the receive differential traces. The transmit trace
closest to one of the receive traces will put more crosstalk onto the closest receive trace; this can
greatly degrade the receiver's BER over long cables. After exiting the PLC, the transmit traces
should be kept 0.3” or more away from the nearest receive trace. In the vicinities where the traces
enter or exit the magnetics, the RJ-45/11 and the PLC are the only possible exceptions.
6. Use of an inferior magnetics module. The magnetics modules used by Intel have been fully tested
for IEEE PLC conformance, long-cable BER problems, and emissions and immunity. (Inferior
magnetics modules often have less common-mode rejection and/or no auto-transformer in the
transmit channel.)
7. Another common mistake is using an 82555 or 82558 physical layer schematic in a PLC design.
The transmit terminations and decoupling are different, and there also are differences in the receive
circuit. Use the appropriate reference schematic or application notes.
8. Not using (or incorrectly using) the termination circuits for the unused pins at the RJ-45/11 and for
the wire-side center-taps of the magnetics modules. These unused RJ pins and wire-side center-taps
must be correctly referenced to chassis ground via the proper value resistor and capacitor or
termination plane. If these are not terminated properly, there can be emission (FCC) problems,
IEEE conformance issues, and long-cable noise (BER) problems. The application notes contain
schematics that illustrate the proper termination for these unused RJ pins and the magnetics center-
taps.
9. Incorrect differential trace impedances. It is important to have ~100 Ω impedance between the two
traces within a differential pair. This becomes even more important as the differential traces
become longer. It is very common to see customer designs that have differential trace impedances
between 75 Ω and 85 Ω, even when the designers think they have designed for 100 Ω. (To
calculate the differential impedance, many impedance calculators only multiply the single-ended
impedance by two. This does not take into account edge-to-edge capacitive coupling between the
two traces. When the two traces within a differential pair are kept close (see Note) to each other,
the edge coupling can lower the effective differential impedance by 5 Ω to 20 Ω. A 10-Ω to 15-Ω
drop in impedance is common.) Short traces will have fewer problems if the differential impedance
is a little off.
10. Another common problem is to use a too-large capacitor between the transmit traces and/or too
much capacitance from the magnetic's transmit center-tap (on the 82562ET side of the magnetics)










