Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide 77
The ICH2 RTC requires some additional external circuitry. The RTCRST# signal is used to reset the
RTC well. The external capacitor and the external resistor between RTCRST# and the RTC battery
(Vbat) were selected to create a RC time delay such that RTCRST# goes high some time after the battery
voltage is valid. The RC time delay should be within the range of 10–20 ms. When RTCRST# is
asserted, bit 2 (RTC_PWR_STS) in the GEN_PMCON_3 (General PM Configuration 3) register is set to
1 and remains set until cleared by software. As a result, when the system boots, the BIOS knows that the
RTC battery has been removed.
This RTCRST# circuit is combined with the diode circuit (see previous figure) that allows the RTC well
to be powered by the battery when system power is unavailable. The previous figure shows an example
of this circuitry when used in conjunction with the external diode circuit.
3.20.6. RTC Routing Guidelines
• All RTC OSC signals (RTCX1, RTCX2, VBIAS) should all be routed with trace lengths less than
1”. The shorter, the better.
• Minimize the capacitance between RTCX1 and RTCX2 in the routing. (Optimally, there would be a
ground line between them.)
• Put a ground plane under all external RTC circuitry.
• Do not route any switching signals under the external components (unless on the other side of the
ground plane).
3.20.7. VBIAS DC Voltage and Noise Measurements
• All RTC OSC signals (RTCX1, RTCX2, VBIAS) should all be routed with trace lengths less than
1”. The shorter, the better.
• Steady-state VBIAS is a DC voltage of about 0.38 V ± 0.06 V.
• When the battery is inserted, VBIAS will be “kicked” to about 0.7–1.0 V, but it will return to its DC
value within a few ms.
• Noise on VBIAS must be kept to a minimum (200 mV or less).
• VBIAS is very sensitive and cannot be directly probed, but it can be probed through a .01-µF
capacitor.
• Excessive noise on VBIAS can cause the ICH2 internal oscillator to misbehave or even stop
completely.
• To minimize VBIAS noise, it is necessary to implement the routing guidelines described previously
as well as the required external RTC circuitry, as described in the Intel
®
82801BA I/O Controller
Hub 2 (ICH2) Datasheet.
3.20.8. Power-well Isolation Control
The circuit shown in the figure below should be implemented to control well isolation between the3.3V
resume and RTC power-wells. Failure to implement this circuit may result in excessive droop on the
VCCRTC node during Sx- to-G3 power state transitions (removal of AC power).