Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide 73
3.19. PCI
The ICH2 provides a PCI Bus interface compliant with the PCI Local Bus Specification, Revision 2.2.
The implementation is optimized for high-performance data streaming when the ICH2 is acting as either
the target or the initiator on the PCI bus. For more information on the PCI Bus interface, refer to the PCI
Local Bus Specification, Revision 2.2.
The ICH2 supports six PCI Bus masters (excluding the ICH2), by providing six REQ#/GNT# pairs. In
addition, the ICH2 supports two PC/PCI REQ#/GNT# pairs, one of which is multiplexed with a PCI
REQ#/GNT# pair.
Figure 40. PCI Bus Layout Example
IO_subsys_PCI_layout
ICH2
3.20. RTC
The ICH2 contains a real-time clock (RTC) with 256 bytes of battery-backed SRAM. The internal RTC
module provides two key functions: keeping the date and time, and storing system data in its RAM when
the system is powered down.
This section presents the recommended RTC circuit hook-up for ICH2.