Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide 63
3.13. AC’97
The ICH2 implements an AC’97 2.1-compliant digital controller. Any codec attached to the ICH2 AC-
link must be AC’97 2.1 compliant, as well. Contact your codec IHV for information on 2.1-compliant
products. The AC’97 2.1 specification is available on the Intel website:
http://developer.intel.com/pc-supp/platform/ac97/index.htm
.
The AC-link is a bi-directional, serial PCM digital stream. It handles multiple input and output data
streams, as well as control register accesses, by employing a time-division-multiplexed (TDM) scheme.
The AC-link architecture enables data transfer through individual frames transmitted serially. Each frame
is divided into 12 outgoing and 12 incoming data streams, or slots. The architecture of the ICH2 AC-link
allows a maximum of two codecs to be connected. The following figure shows a two-codec topology of
the AC-link for the ICH2.
Figure 32. Intel
®
ICH2 AC’97– Codec Connection
AC '97 2.1
controller section
of ICH2
Digital AC '97
2.1 controller
Primary codec
Secondary codec
AC / MC
AC / MC / AMC
ICH2_AC97_codec_conn
SDIN 0
SDIN 1
RESET#
SDOUT
SYNC
BIT_CLK
Intel has developed an advanced common connector for both AC’97 as well as networking options. This
is known as the Communications and Network Riser (CNR). Refer to Section 3.14.
The AC’97 interface can be routed using 5 mil traces with 5 mil space between the traces. Maximum
length between ICH2 to CODEC/CNR is 14” in a tee topology. This assumes that a CNR riser card
implements its audio solution with a maximum trace length of 4” for the AC-link. Trace impedance
should be Z
0
= 60 Ω ± 15%.