Specifications

Intel

810E2 Chipset Platform

54 Design Guide

3.7. Intel

ICH2

3.7.1. Decoupling

The ICH2 is capable of generating large current swings when switching between logic High and logic

Low. This condition could cause the component voltage rails to drop below specified limits. To avoid

this type of situation, ensure that the appropriate amount of bulk capacitance is added in parallel to the

voltage input pins. It is recommended that the developer use the amount of decoupling capacitors

specified in the following table to ensure that the component maintains stable supply voltages. The

capacitors should be placed as close as possible to the package, without exceeding 400 mils

(100–300 mils nominal).

Note: Routing space around the ICH2 is tight. A few decoupling caps may be placed more than 300 mils away

from the package. System designers should simulate the board to ensure that the correct amount

decoupling is implemented. Refer to the following figure for a layout example. It is recommended that,

for prototype board designs, the designer include pads for extra power plane decoupling caps.

Table 17. Decoupling Capacitor Recommendation

Power Plane/Pins Decoupling Capacitors Capacitor Value

3.3-V core 6 0.1 µF

3.3-V standby 1 0.1 µF

Processor interface (1.3 ~ 2.5 V) 1 0.1 µF

1.8-V core 2 0.1 µF

1.8-V standby 1 0.1 µF

5-V reference 1 0.1 µF

5-V reference standby 1 0.1 µF