Specifications

A
A
A A
Place as close as
Possible to GMCH
and via straight to
VSS plane.
GMCH RESET STRAPS
Place R242A within 0.5"
of the GMCH Ball.
Use Surface Mount Caps
placed as close as possible to
power pins with short,
wide direct connections
82810E, PART 3: DISPLAY CACHE
AND VIDEO INTERFACE
Jumper Comment
Function
XOR
IN = XOR Tree
*OUT = Normal
Tri-state
JP22A IN = Tri-state Mode
*OUT = Normal
System
Bus Freq.
N/A
Reads System
Bus Freq.
IOQ Depth
JP23A
IN = IOQ Depth of 1
*Out = IOQ Depth of 4
VCORE
Detect
RESVD
N/A
JP24A
Detects type of Processor
I/O Buffers
TBD
Do not Stuff C374A
Place site w / in 0.5"
of clock ball (AA21).
JP21A
Do Not Populate C375A
IntelĀ® 810e2 Chipset Customer Reference Board
82810E, Part 3 : Display Cache and Video
34
1.0
10/24/00
9
IAMG Platform Apps Engineering
1900 Prairie City Road
Folsom, Ca. 95630
REV.
R
Last Revision Date:
Sheet:
of
Title:
int
e
l
OCLK_FB
DC _MD31
DC _MD30
DC _MD28
DC _MD26
GRS_PU26
GRS_PU28
GRS_PU31
GRS_PU30
DC_MD21
DC_MD29
VCCDACA
DC_MD14
DC_MD3
DC_MD6
DC_MD7
RCLK
FTD10
DC_MA2
DC_MD10
DC_MD15
DC_MD26
DC_MD12
DC_MD8
DC_MD9
FTD1
FTD2
DC_DQM1
DC_DQM2
DC_MA11
DC_MD0
DC_MD5
DC_MA10
DC_MA3
DC_MA5
DC_MD25
FTD8
DC_MD17
FTD3
DC_MA8
DC_MD4
R_LTCLK
FTD0
DC_DQM0
DC_MA0
DC_MD31
FTD9
DC_MA1
DC_MA6
DC_MD11
DC_MD20
DC_MD22
OCLK
DC_DQM3
DC_MD13
DC_MD27
DC_MD30
FTD11
FTD4
DC_MA9
DC_MD24
IREFPD
DC_MD1
DC_MD16
DC_MD18
DC_MD23
FTD7
DC_MD13
DC_MA7
DC_MD2
FTD6
DC_MD29
DOTCLK
DC_MA4
DC_MD19
DC_MD28
FTD5
FREQSEL 6,31
FTBLNK# 24
SL_STALL 24
DC_CLK10
DC_RAS#10
DC_CAS#10
DC_WE#10
DC_CS#10
DC_DQM[3:0]10
DC_MA[11:0]10
DC_MD[31:0]10
FTD[11:0] 24
R_REFCLK 31
CRT_HSYNC 25
3VFTSCL 24,25
CRT_VSYNC 25
VID_RED 25
FTCLK1 24
DOTCLK 6
VID_BLUE 25
3VDDCCL 25
VID_GREEN 25
3VFTSDA 24,25
FTCLK0 24
FTHSYNC 24
FTVSYNC 24
3VDDCDA 25
VCC1_8
VCC1_8
VCC3_3
+
33UF
C36A
12
RP3A
10K
1
2
3
4 5
6
7
8
R62A
174
1%
R65A
33
R64A
0K
R63A
22
0.1UF
C35A
0.01UF
C34A
JP4A
JP5A
JP3A
JP2A
L7A
68NH-0.3A
RP4A
10K
1
2
3
4 5
6
7
8
18PF
C37A
22PF
C38A
INTERFACE
VIDEO DIGITAL OUT
GRAPHICS INTERFACE
DISPLAY CACHE
U3C
AND
VIDEO INTERFACE
DISPLAY CACHE
INTEL 82810E
PART3
V19
AC23
V21
V22
AA21
W20
W19
AC22
AB20
AA23
Y23
K20
L20
P21
R23
C23
F20
M19
P19
M20
L19
P20
N19
J21
H19
H20
H18
G19
F19
M22
M21
P23
P22
N23
N21
N20
M23
F23
E20
E21
E23
L23
D22
D23
D21
C22
H21
H22
H23
G20
G22
G23
L22
F21
F22
K21
K23
R19
R20
R22
R21
J23
K19
J20
K22
T19
T20
Y21
Y20
T22
T21
W23
W22
W21
V23
U23
U22
U21
T23
J19
AC21
U20
U19
V20
E19
AC20
AB23
AB21
U6
E18
AA22
AB22
T6
J6
G6
E2
A1
B5
B9
E11
B13
E16
B17
B21
G18
K18
P18
T18
AA19
AA20
BLANK#
BLUE
CLKOUT0
CLKOUT1
DCLKREF
DDCCL
DDCDA
GREEN
HSYNC
IREF
IWASTE
LCAS#
LCS#
LDQM0
LDQM1
LDQM2
LDQM3
LMA0
LMA1
LMA10
LMA11
LMA2
LMA3
LMA4
LMA5
LMA6
LMA7
LMA8
LMA9
LMD0
LMD1
LMD10
LMD11
LMD12
LMD13
LMD14
LMD15
LMD16
LMD17
LMD18
LMD19
LMD2
LMD20
LMD21
LMD22
LMD23
LMD24
LMD25
LMD26
LMD27
LMD28
LMD29
LMD3
LMD30
LMD31
LMD4
LMD5
LMD6
LMD7
LMD8
LMD9
LOCLK
LRAS#
LRCLK
LTCLK
LTVCL
LTVDA
LTVDATA0
LTVDATA1
LTVDATA10
LTVDATA11
LTVDATA2
LTVDATA3
LTVDATA4
LTVDATA5
LTVDATA6
LTVDATA7
LTVDATA8
LTVDATA9
LWE#
RED
TVCLKIN/SL_STALL
TVHSYNC
TVVSYNC
VCCBA
VCCDA
VCCDACA1
VCCDACA2
VCCHA
VSSBA
VSSDA
VSSDACA
VSSHA
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSYNC