Specifications

A
A
A A
Clock Synthesizer
- Place all decoupling caps as close to VCC/GND pins as possible
Notes:
Minimize Stub Length from
CLK14 trace to
JP20A.
- PCI_0/ICH pin has to go to the ICH.
- CPU_ITP pin must go to the ITP. It is the only
CPU CLK that can be shut off through the SMBUS interface.
(This clock cannot be turned off through SMBus)
APIC Clk Strap JP20A
16 MHz
33 MHz
in
out
Intel® 810e2 Chipset Customer Reference Board
Clock Synthesizer
34
1.0
10/24/00
6
IAMG Platform Apps Engineering
1900 Prairie City Road
Folsom, Ca. 95630
REV.
R
Last Revision Date:
Sheet:
of
Title:
int
e
l
JP1
DCLK
MEMCLK2
MEMCLK1
MEMCLK4
MEMCLK7
MEMCLK3
MEMCLK5
MEMCLK0
MEMCLK6
APIC_0
DRAM_1
XTAL_IN
CPU_0_1
DRAM_7
MEMV3
PCIV3
PCI_0
3V66_0
PCI_1
PCI_2
PCI_5
PCI_6
US B_0
L_VCC2_5
XTAL_OUT
USBV3
PCI_4
USB_1
REFCLK
APIC_1
DRAM_0
DRAM_2
DRAM_3
DRAM_4
DRAM_5
DRAM_6
SEL1_PU
3V66_1
PCI_3
PCI_3
L_CKVDDA
CPU_2
DCLK_WR 8
FREQSEL 9,31
APICCLK_CPU 4
APICCLK_ICH 13
CPUHCLK 4
GMCHHCLK 7
ITPCLK 4
SLP_S3# 14,16,30
CK_SMBDATA 25
CK_SMBCLK 25
ICH_CLK1414
ICH_3V6614
GMCH_3V668
PCLK_0/ICH13
DOTCLK9
USBCLK14,16
PCLK_615
PCLK_518
PCLK_416
PCLK_318
PCLK_217
PCLK_117
FMOD131
SIO_CLK2414 ,16
MEMCLK[7:0] 11,12
VCC3_3
VCC3_3
VCC3_3
VCC2_5
VCC3_3
Y1A
XTAL
14.318MHZ
1 2
+
22UF
C4A
12
+
4.7UF
C26A
12
+
22UF
C11A
12
+
22UF
C19A
12
L4A
1 2
L3A
1 2
L5A
1 2
L6A
1 2
R54A
10K
R26A
8.2K
R42A
33
R44A
33
R46A
33
R52A
33
R53A
22
R48A
33
R49A
33
R40A
33
R38A
33
R35A
22
R33A
22
R36A
22
R37A
22
R39A
22
R41A
22
R43A
22
R45A
22
R47A
22
R31A
10
R28A
33
R32A
33
R27A
33
R34A
22
R50A
22
R29A
33
R30A
33
.001UF
C9A
0.1UF
C10A
0.1UF
C5A
0.1UF
C14A
0.1UF
C8A
.001UF
C15A
.001UF
C7A
12PF
C20A
0.1UF
C12A
.001UF
C13A
.001UF
C24A
0.1UF
C25A
12PF
C21A
.1UF
C16A
.001UF
C6A
.1UF
C18A
.001UF
C17A
JP1A
0.1UF
C22A
.001UF
C23A
BC22
X10PF
BC23
X10PF
R51A
10
L2A
1 2
CPU
APIC
USB
REF
CK810e
3V66
PCI
Memory
U2A
7
8
55
54
52
50
49
11
12
13
15
16
18
19
20
1
31
30
46
45
43
42
40
39
37
36
28
29
25
26
51
53
2 9 10 21 27 33 38 44
22
48
56
5 6 14 17 24 35 41 47
23
3
4
34
32
3V66_0
3V66_1
APIC_0
APIC_1
CPU_0
CPU_1
CPU_2/ITP
PCI_0/ICH
PCI_1
PCI_2
PCI_3
PCI_4
PCI_5
PCI_6
PCI_7
REF0
SCLK
SDATA
SDRAM_0
SDRAM_1
SDRAM_2
SDRAM_3
SDRAM_4
SDRAM_5
SDRAM_6
SDRAM_7
SEL0
SEL1
USB_0
USB_1
VDD2_5[0]
VDD2_5[1]
VDD3_3[0] VDD3_3[1] VDD3_3[2] VDD3_3[3] VDD3_3[4] VDD3_3[5] VDD3_3[6] VDD3_3[7]
VDD_A
VSS2_5[0]
VSS2_5[1]
VSS3_3[0] VSS3_3[1] VSS3_3[2] VSS3_3[3] VSS3_3[4] VSS3_3[5] VSS3_3[6] VSS3_3[7]
VSS_A
XTAL_IN
XTAL_OUT
DCLK
PWRDWN#