Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide
189
Appendix A: Intel
®
810E2 Chipset Platform
Reference Schematics
This appendix provides a set of schematics for Intel’s 810E2 chipset platform. The feature list is shown
below:
Intel
®
810E2 Chipset Reference Schematics Feature Set
• 810E2 Chipset
 Graphics and Memory Controller Hub (GMCH)
 I/O Controller Hub (ICH)
 FWH Flash BIOS
• Support for the Celeron or Pentium III processor (66/100/133 MHz System Bus Frequency)
• Debug Port
• Synchronous SDRAM Memory Interface
 100 MHz SDRAM Support
 2 DIMM Sockets
• 4 MB Display Cache (133 MHz)
• PCI 2.2 interface
 6 REQ#/GNT# pairs
• Integrated LAN controller
• Bus master IDE controller: supports Ultra ATA/100
• USB controller
• I/O APIC
• LPC Interface
• AC‘97 2.1 Interface
• FWH interface
• Integrated System Management controller
• Intel On-board VRM (VRM 8.4, Rev 1.5 Compliant)
• 4-Layer Design