Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide
161
Processor Pin I/O Recommendations
VREF[7:0] I Connect to Vref voltage divider made up of 75 and 150 Ω 1% resistors connected to Vtt.
Decoupling Guidelines:
4 ea. (min) 0.1 µF in 0603 package placed within 500 mils of VREF pins.
VTT I Connect AH20, AK16, AL13, AL21, AN11, AN15, and G35 to 1.5V regulator. Provide
high and low frequency decoupling.
Decoupling Guidelines:
19 ea (min) 0.1 µF in 0603 package placed within 200 mils of AGTL+ termination resistor
packs (r-paks). Use one capacitor for every two (r-paks).
4 ea (min) 0.47 µF in 0612 package
Additional VTT I AA33, AA35, AN21, E23, S33, S37, U35, U37
GND N/A AJ3
NO CONNECTS N/A The following pins must be left as no-connects: AK30, AM2, F10, G37, L33, N33, N35,
N37, Q33, Q35, Q37, R2, W35, X2, Y1
NOTES:
1. If the Celeron processor (CPUID = 0665) is not supported by the motherboard, then RTTCTRL is pulled down
with a 56
Ω resistor and RESET2# is grounded.
Table 46. GMCH Checklist
Checklist Line Items Comments
VCCDA VCCDA needs to be connected to an isolated power plane.
HCLK, SCLK 22 pF cap to ground as close as possible to GMCH.
GTLREFA, GTLREFB Refer to the latest design guide for the correct GTLREF generation circuit.
HUBREF Refer to the latest design guide for the correct HUBREF generation circuit. Also, place a
0.1 µF cap as close as possible to GMCH to ground.
IWASTE Tie to ground.
IREF Place a resistor as close as possible to GMCH and via straight to VSS plane. A 174 Ω 1%
resistor is recommended.
LTVCL, LTVDA 10 kΩ (approximate) pull-up resistor to 3.3V if digital video out is not implemented.
LTCLK Series resistor 22 Ω ± 2%.
OCLK/RCLK Series resistor 33 Ω ± 2%.