Specifications

Intel
®
810E2 Chipset Platform
R
16 Design Guide
Term Definition
Pad A feature of a semiconductor die contained within an internal logic package on the
S.E.C cartridge substrate used to connect the die to the package bond wires. A pad is
only observable in simulation.
Pin A feature of a logic package contained within the S.E.C. cartridge used to connect the
package to an internal substrate trace.
Ringback Ringback is the voltage that a signal rings back to after achieving its maximum absolute
value. Ringback may be due to reflections, driver oscillations, etc. See the respective
processor’s datasheet for ringback specification.
Settling Limit Defines the maximum amount of ringing at the receiving pin that a signal must reach
before its next transition. See the respective processor’s datasheet for settling limit
specification.
Setup Window Is the time between the beginning of Setup to Clock (T
SU_MIN
) and the arrival of a valid
clock edge. This window may be different for each type of bus agent in the system.
Simultaneous Switching
Output (SSO) Effects
Refers to the difference in electrical timing parameters and degradation in signal quality
caused by multiple signal outputs simultaneously switching voltage levels (e.g., high-to-
low) in the opposite direction from a single signal (e.g., low-to-high) or in the same
direction (e.g., high-to-low). These are respectively called odd-mode switching and
even-mode switching. This simultaneous switching of multiple outputs creates higher
current swings that may cause additional propagation delay (or “pushout”), or a
decrease in propagation delay (or “pull-in”). These SSO effects may impact the setup
and/or hold times and are not always taken into account by simulations. System timing
budgets should include margin for SSO effects.
Stub The branch from the trunk terminating at the pad of an agent.
Test Load Intel uses a 50 Ω test load for specifying its components.
Trunk The main connection, excluding interconnect branches, terminating at agent pads.
Undershoot Maximum voltage allowed for a signal to extend below VSS at the processor core pad.
See the respective processor’s datasheet for undershoot specifications.
Victim A network that receives a coupled crosstalk signal from another network is called the
victim network.
VREF Guardband A guardband (DV
REF
) defined above and below V
REF
to provide a more realistic model
accounting for noise such as crosstalk, V
TT
noise, and V
REF
noise.