Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide
143
6. Power Delivery
The following figure shows the power delivery architecture for an example 810E2 chipset platform. This
power delivery architecture supports the “Instantly Available PC Design Guidelines” via the suspend-to-
RAM (STR) state.
During STR, only the necessary devices are powered. These devices include: main memory, the ICH2
resume well, PCI wake devices (via 3.3 Vaux), AC’97, and optionally USB. (USB can be powered only
if sufficient standby power is available.) To ensure that enough power is available during STR, a
thorough power budget should be completed. The power requirements should include each device’s
power requirements, both in suspend and in full-power. The power requirements should be compared
with the power budget supplied by the power supply. Due to the requirements of main memory and the
PCI 3.3 Vaux (and possibly other devices in the system), it is necessary to create a dual power rail.
The solutions in this Design Guide are only examples. Many power distribution methods achieve the
similar results. When deviating from these examples, it is critical to consider the effect of a change.