Specifications

Intel
®
810E2 Chipset Platform
R
14 Design Guide
Term Definition
Suspend-To-RAM (STR) In the STR state, the system state is stored in main memory and all unnecessary
system logic is turned off. Only main memory and logic required to wake the system
remain powered.
Full-power operation During full-power operation, all components on the motherboard remain powered. Note
that full-power operation includes both the full-on operating state (S0) and the processor
Stop Grant state (S1).
Suspend operation During suspend operation, power is removed from some components on the
motherboard. The customer reference board supports three suspend states: processor
Stop Grant (S1), Suspend-to-RAM (S3) and Soft-off (S5).
Power rails An ATX power supply has 6 power rails: +5V, -5V, +12V, -12V, +3.3V, +5VSB. In
addition to these power rails, several other power rails can be created with voltage
regulators.
Core power rail A power rail that is only on during full-power operation. These power rails are on when
the PSON signal is asserted to the ATX power supply. The core power rails that are
distributed directly from the ATX power supply are: ±5V, ±12V and +3.3V.
Standby power rail A power rail that in on during suspend operation (these rails are also on during full-
power operation). These rails are on at all times (when the power supply is plugged into
AC power). The only standby power rail that is distributed directly from the ATX power
supply is 5VSB (5V Standby). There can be other standby rails that are created with
voltage regulators.
Derived power rail A derived power rail is any power rail that is generated from another power rail using an
on-board voltage regulator. For example, 3.3VSB is usually derived (on the
motherboard) from 5VSB using a voltage regulator.
Dual power rail A dual power rail is derived from different rails at different times (depending on the
power state of the system). Usually, a dual power rail is derived from a standby supply
during suspend operation and derived from a core supply during full-power operation.
Aggressor A network that transmits a coupled signal to another network is called the aggressor
network.
AGTL+ The processor system bus uses a bus technology called AGTL+, or Assisted Gunning
Transceiver Logic. AGTL+ buffers are open-drain and require pull-up resistors for
providing the high logic level and termination. The processor AGTL+ output buffers
differ from GTL+ buffers with the addition of an active pMOS pull-up transistor to “assist”
the pull-up resistors during the first clock of a low-to-high voltage transition. Additionally,
the processor Single Edge Connector (S.E.C.) cartridge contains 56 Ω pull-up resistors
to provide termination at each bus load.
Bus Agent A component or group of components that, when combined, represent a single load on
the AGTL+ bus.
Corner Describes how a component performs when all parameters that could impact
performance are adjusted to have the same impact on performance. Examples of these
parameters include variations in manufacturing process, operating temperature, and
operating voltage. The results in performance of an electronic component that may
change as a result of corners include (but are not limited to): clock to output time, output
driver edge rate, output drive current, and input drive current. Discussion of the “slow”
corner would mean having a component operating at its slowest, weakest drive strength
performance. Similar discussion of the “fast” corner would mean having a component
operating at its fastest, strongest drive strength performance. Operation or simulation of
a component at its slow corner and fast corner is expected to bound the extremes
between slowest, weakest performance and fastest, strongest performance.