Specifications

Intel
®
810E2 Chipset Platform
R
138 Design Guide
Figure 81. Different Topologies for the Clock Routing Guidelines
Layout 1
B
A
Layout 2
BC
A
B
D
Layout 4
Socket/
Connector
Socket/
Connector
Layout 3
A
B
C
B
A
Layout 5
B
C
A
A
BD
A
Layout 6
B
C
A
C