Specifications
Intel
®
810E2 Chipset Platform
R
134 Design Guide
Features (56 Pin SSOP Package)
• 3 copies of processor clock 66/100/133 MHz (2.5V) (Processor, GMCH, ITP)
• 9 copies of 100 MHz (all the time) SDRAM clock (3.3V) (SDRAM[0:7], DClk)
• 8 copies of PCI clock (33 MHz ) (3.3V)
• 2 copies of APIC clock @16.67 MHz or 33 MHz, synchronous to processor clock (2.5V)
• 2 copy of 48 MHz clock (3.3V) [Non SSC]
• 2 copies of 3V66 MHz clock (3.3V)
• 1 copy of REF clock @14.31818 MHz (3.3V) also used as input strap to determine APIC frequency
• 66/100/133 MHz processor operation (selectable at power up only)
• Ref. 14.31818 MHz Xtal oscillator input
• Power Down Pin
• Spread spectrum support
• I
2
C Support for turning off unused clocks










