Specifications

Intel
®
810E2 Chipset Platform
R
Design Guide
125
Additional aggressors are possible in the z-direction, if adjacent signal layers are not routed in mutually
perpendicular directions. Because crosstalk-coupling coefficients decrease rapidly with increasing
separation, it is rarely necessary to consider aggressors that are at least five line widths separated from
the victim. The maximum crosstalk occurs when all the aggressors are switching in the same direction at
the same time.
There is crosstalk internal to the IC packages, which can also affect the signal quality.
Backward crosstalk is present in both stripline and microstrip geometry (see Figure 72). A way to
remember which geometry is stripline and which is microstrip is that a stripline geometry requires
stripping a layer away to see the signal lines. The backward-coupled amplitude is proportional to the
backward crosstalk coefficient, the aggressor’s signal amplitude, and the coupled length of the network
up to a maximum that is dependent on the rise/fall time of the aggressor’s signal. Backward crosstalk
reaches a maximum (and remains constant) when the propagation time on the coupled network length
exceeds one half of the rise time of the aggressor’s signal. Assuming the ideal ramp on the aggressor
from 0% to 100% voltage swing, and the fall time on an unloaded coupled network, then:
LengthforMaxBaxkwardCrosstalk = (½ x FallTime) / (BoardDelayPerUnitLength)
An example calculation follows when the fast corner fall time is 3 V/ns and board delay is
175 ps/inch (2.1 ns/foot):
Fall time = 1.5 V/3 V/ns = 0.5 ns
Length for Max Backward Crosstalk = ½ * 0.5 ns * 1000 ps/ns /175 ps/in = 1.43 inches
Agents on the AGTL+ bus drive signals in each direction on the network. This causes backward crosstalk
from segments on two sides of a driver. The pulses from the backward crosstalk travel toward each other
and meet and add at certain moments and positions on the bus. This can cause the voltage (noise) from
crosstalk to double.
4.2.3.1. Potential Termination Crosstalk Problems
The use of commonly used “pull-up” resistor networks for AGTL+ termination may not be suitable.
These networks have a common power or ground pin at the extreme end of the package, shared by 13 to
19 resistors (for 14- and 20-pin components). These packages generally have too much inductance to
maintain the voltage/current needed at each resistive load. Intel recommends using discrete resistors,
resistor networks with separate power/ground pins for each resistor, or working with a resistor network
vendor to obtain resistor networks that have acceptable characteristics.
4.3. More Details and Insight
4.3.1. Textbook Timing Equations
The following “textbook” equations used to calculate the propagation rate of a PCB are the basis for
spreadsheet calculations for timing margin based on the component parameters.