User`s manual

Using the Verilog PLI
5-90 Verilog Simulation ModelSim Xilinx User’s Manual
acc_fetch_itfarg acc_fetch_tfarg_int acc_fetch_itfarg_int
acc_fetch_tfarg_str acc_fetch_itfarg_str acc_fetch_timescale_info
acc_fetch_type acc_fetch_type_str acc_fetch_value
acc_free acc_handle_by_name acc_handle_calling_mod_m
acc_handle_condition acc_handle_conn acc_handle_hiconn
acc_handle_interactive_scope acc_handle_loconn acc_handle_modpath
acc_handle_notifier acc_handle_object acc_handle_parent
acc_handle_path acc_handle_pathin acc_handle_pathout
acc_handle_port acc_handle_scope acc_handle_simulated_net
acc_handle_tchk acc_handle_tchkarg1 acc_handle_tchkarg2
acc_handle_terminal acc_handle_tfarg acc_handle_itfarg
acc_handle_tfinst acc_initialize acc_next
acc_next_bit acc_next_cell acc_next_cell_load
acc_next_child acc_next_driver acc_next_hiconn
acc_next_input acc_next_load acc_next_loconn
acc_next_modpath acc_next_net acc_next_output
acc_next_parameter acc_next_port acc_next_portout
acc_next_primitive acc_next_scope acc_next_specparam
acc_next_tchk acc_next_terminal acc_next_topmod
acc_object_in_typelist acc_object_of_type acc_product_type
acc_product_version acc_release_object acc_replace_delays
acc_replace_pulsere acc_reset_buffer acc_set_interactive_scope
acc_set_pulsere acc_set_scope acc_set_value
acc_vcl_add acc_vcl_delete acc_version