User`s manual

Using the Verilog PLI
ModelSim Xilinx User’s Manual Verilog Simulation 5-81
p_tffn checktf; /* argument checking callback function */
p_tffn sizetf; /* function return size callback function */
p_tffn calltf; /* task or function call callback function */
p_tffn misctf; /* miscellaneous reason callback function */
char *tfname;/* name of system task or function */
/* The following fields are ignored by ModelSim Verilog */
int forwref;
char *tfveritool;
char *tferrmessage;
int hash;
struct t_tfcell *left_p;
struct t_tfcell *right_p;
char *namecell_p;
int warning_printed;
} s_tfcell, *p_tfcell;
The various callback functions (checktf, sizetf, calltf, and misctf) are described in
detail in Section 17 of the IEEE Std 1364. The simulator calls these functions for
various reasons. All callback functions are optional, but most applications contain
at least the calltf function, which is called when the system task or function is
executed in the Verilog code. The first argument to the callback functions is the
value supplied in the data field (many PLI applications don’t use this field). The
type field defines the entry as either a system task (USERTASK) or a system
function that returns either a register (USERFUNCTION) or a real
(USERREALFUNCTION). The tfname field is the system task or function name
(it must begin with $). The remaining fields are not used by ModelSim Verilog.
On loading of a PLI application, the simulator first looks for an init_usertfs
function, and then a veriusertfs array. If init_usertfs is found, the simulator calls
that function so that it can call mti_RegisterUserTF for each system task or
function defined. The mti_RegisterUserTF function is declared in veriuser.h as
follows:
void mti_RegisterUserTF(p_tfcell usertf);
The storage for each usertf entry passed to the simulator must persist throughout
the simulation, because the simulator de-references the usertf pointer to call the
callback functions. It is recommended that you define your entries in an array,
with the last entry set to 0. If the array is named veriusertfs (as is the case for
linking to Verilog-XL), then you don’t have to provide an init_usertfs function,
and the simulator will automatically register the entries directly from the array (the
last entry must be 0). For example,
s_tfcell veriusertfs[] = {
{usertask, 0, 0, 0, abc_calltf, 0, "$abc"},
{usertask, 0, 0, 0, xyz_calltf, 0, "$xyz"},