User`s manual

Compilation
5-60 Verilog Simulation ModelSim Xilinx User’s Manual
Verilog-XL compatible compiler options
See vlog (CR-141) for a complete list of compiler options. The options described
here are equivalent to Verilog-XL options. Many of these are provided to ease the
porting of a design to ModelSim Verilog.
+define+<macro_name>[=<macro_text>]
This option allows you to define a macro from the command line that is equivalent
to the following compiler directive:
‘define <macro_name> <macro_text>
Multiple +define options are allowed on the command line. A command line
macro overrides a macro of the same name defined with the ‘define compiler
directive.
+incdir+<directory>
This option specifies directories to search for files included with ‘include
compiler directives. By default, the current directory is searched first and then the
directories specified by the +incdir options in the order they appear on the
command line. You may specify multiple +incdir options as well as multiple
directories separated by "+" in a single +incdir option.
+delay_mode_distributed
This option disables path delays in favor of distributed delays. See Delay modes
(5-71) for details.
+delay_mode_path
This option sets distributed delays to zero in favor of path delays. See Delay
modes
(5-71) for details.
+delay_mode_unit
This option sets path delays to zero and non-zero distributed delays to one time
unit. See Delay modes
(5-71) for details.
+delay_mode_zero
This option sets path delays and distributed delays to zero. See Delay modes (5-71)
for details.
-f <filename>
This option reads more command line arguments from the specified text file.
Nesting of -f options is allowed.