User`s manual

TextIO implementation issues
4-48 VHDL Simulation ModelSim Xilinx User’s Manual
Using STD_INPUT and STD_OUTPUT within ModelSim
The standard VHDL’87 TextIO package contains the following file declarations:
file
input: TEXT is in "STD_INPUT";
file output: TEXT is out "STD_OUTPUT";
The standard VHDL’93 TextIO package contains these file declarations:
file
input: TEXT open read_mode is "STD_INPUT";
file output: TEXT open write_mode is "STD_OUTPUT";
STD_INPUT is a file_logical_name that refers to characters that are entered
interactively from the keyboard, and STD_OUTPUT refers to text that is
displayed on the screen.
In ModelSim reading from the STD_INPUT file brings up a dialog box that allows
you to enter text into the current buffer. The last line written to the STD_OUTPUT
file appears as a prompt in this dialog box. Any text that is written to the
STD_OUTPUT file is also echoed in the Transcript window.
TextIO implementation issues
Writing strings and aggregates
A common error in VHDL source code occurs when a call to a WRITE procedure
does not specify whether the argument is of type STRING or BIT_VECTOR. For
example, the VHDL procedure:
WRITE (L, "hello");
will cause the following error:
ERROR: Subprogram "WRITE" is ambiguous.
In the TextIO package, the WRITE procedure is overloaded for the types STRING
and BIT_VECTOR. These lines are reproduced here:
procedure WRITE(L: inout LINE; VALUE: in BIT_VECTOR;
JUSTIFIED: in SIDE:= RIGHT; FIELD: in WIDTH := 0);
procedure WRITE(L: inout LINE; VALUE: in STRING;
JUSTIFIED: in SIDE:= RIGHT; FIELD: in WIDTH := 0);
The error occurs because the argument "hello" could be interpreted as a string or
a bit vector, but the compiler is not allowed to determine the argument type until
it knows which function is being called.
The following procedure call also generates an error:
WRITE (L, "010101");