User`s manual

ModelSim Xilinx User’s Manual Index - 299
Index
A
architecture simulator state variable 283
argc simulator state variable
283
AssertFile .ini file variable
262
AssertionFormat .ini file variable
263
Assertions
selecting severity that stops simulation
213
B
Batch mode 290
Break
on assertion
213
BreakOnAssertion .ini file variable
263
Breakpoints
deleting
152
setting
152
viewing
152
C
Cell libraries 71
CheckpointCompressMode .ini file variable
263
CheckSynthesis .ini file variable
261
Colors
changing window colors with the GUI
277
Command reference
20
CommandHistory .ini file variable
263
Command-line mode
290
Commands
library management commands
25
VSIM Tcl commands
250
Compilation and Simulation
Verilog
54–94
VHDL
43–52
Compiler directives
78
IEEE Std 1364-1995
78
XL compatible compiler directives
79
Compiling
locating source errors
196
projects
41
Verilog
XL ’uselib compiler directive
63
XL compatible options
60
Verilog designs
55
incremental compilation
56
with VITAL packages
52
compiling
with the graphic interface
195
concatenation
of signals
104
ConcurrentFileLimit .ini file variable
263
configuration simulator state variable
283
Cur_Top_DUs .mpf file variable
266
D
Dataset Browser 97
Datasets
restrict dataset prefix display
99
the Dataset Browser
97
DefaultForceKind .ini file variable
263
DefaultRadix .ini file variable
263
Delay
specifying stimulus delay
149
DelayFileOpen .ini file variable
264
Delta
collapse deltas in the List window
132
referencing simulator iteration
as a simulator state variable
283
delta simulator state variable
283
Dependent design units
45
Descriptions of HDL items
156
Design hierarchy
viewing in Structure window
158
Design library