User`s manual

Sections in this document
ModelSim Xilinx User’s Manual Introduction 1-19
The ModeSim Tutorial is available from the ModelSim Help menu.
Sections in this document
In addition to this introduction, you will find the following major sections in this
document:
2 - Design Libraries
(2-23)
To simulate an HDL design using ModelSim, you need to know how to create, compile,
maintain, and delete design libraries as described in this chapter.
3 - Projects and system initialization
(3-35)
This chapter provides a definition of a ModelSim "project" and discusses the use of a new
file extension for project files.
4 - VHDL Simulation
(4-43)
This chapter is an overview of compilation and simulation for VHDL within the ModelSim
environment.
5 - Verilog Simulation
(5-53)
This chapter is an overview of compilation and simulation for Verilog within the ModelSim
environment.
6 - Multiple logfiles, datasets and virtuals
(6-95)
This chapter describes logfiles, datasets, and virtuals - new methods for viewing and
organizing simulation data in ModelSim.
7 - ModelSim XE Graphic Interface
(7-105)
This chapter describes the graphic interface available while operating VSIM, the ModelSim
simulator. ModelSim’s graphic interface is designed to provide consistency throughout all
operating system environments.
8 - Standard Delay Format (SDF) Timing Annotation
(8-217)
This chapter discusses ModelSim’s implementation of SDF (Standard Delay Format)
timing annotation. Included are sections on VITAL SDF and Verilog SDF, plus
troubleshooting.
9 - Value Change Dump (VCD) Files
(9-233)
This chapter explains Model Technology’s Verilog VCD implementation for ModelSim.
The VCD usage is extended to include VHDL designs.