Technical data

vlog
ModelSim EE/PLUS Reference Manual ModelSim Command Reference
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85
-R <simargs>
Causes VSIM to be invoked on the top-level Verilog modules immediately following
compilation. VSIM is invoked with the arguments specified by
<simargs>
(any arguments
available for
vsim
(p91)).
-refresh
Regenerates a library image. Optional. By default, the work library is updated; use
-work
<library>
to update a different library. See
vlog
examples for more information.
-source
Displays the associated line of source code before each error message that is generated
during compilation. Optional; by default, only the error message is displayed.
-u
Converts regular Verilog identifiers to uppercase. Allows case insensitivity for module
names. Optional.
-v <library_file>
Specifies the Verilog source library file to search for undefined modules. Optional. After
all explicit filenames on the
vlog
command line have been processed, the compiler uses the
-v
option to find and compile any modules that were referenced but not yet defined. See
additional discussion in the examples.
-work <library_name>
Specifies a logical name or pathname of a library that is to be mapped to the logical library
work
. Optional; by default, the compiled design units are added to the
work
library. The
specified pathname overrides the pathname specified for work in the project file.
-y <library_directory>
Specifies the Verilog source library directory to search for undefined modules. Optional.
After all explicit filenames on the
vlog
command line have been processed, the compiler
uses the
-y
option to find and compile any modules that were referenced but not yet defined.
You will need to specify a file suffix by using
-y
in conjunction with the
+libext+<suffix>
option if your filenames differ from your module names. See additional discussion in the
examples.
-93
Specifies that the VHDL interface to Verilog modules shall use VHDL 1076-93 extended
identifiers to preserve case in Verilog identifiers that contain uppercase letters.