Technical data

vcom
ModelSim EE/PLUS Reference Manual ModelSim Command Reference
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75
vcom -nodebug example.vhd
Hides the internal data of
example.vhd
. Models compiled with
-nodebug
cannot use any of
the Model
Sim
debugging features; any subsequent user will not be able to see into the
model.
vcom -nodebug=ports level3.vhd levle2.vhd
vcom -nodebug
top.vhd
The first line compiles and hides the internal data, plus the ports, of the lower-level design
units,
level3.vhd
and
level2.vhd
. The second line compiles the top-level unit,
top.vhd,
without hiding the ports. It is important to compile the top level without
=ports
because
top-level ports must be visible for simulation.
See "Source code security and -nodebug" (p534) for more details.
vcom -noaccel numeric_std example.vhd
When compiling source that uses the
numeric_std
package, this command turns off
acceleration of the
numeric_std
package, located in the
ieee
library.
vcom -explicit example.vhd
Although it is not intuitively obvious, the = operator is overloaded in the
std_logic_1164
package. All enumeration data types in VHDL get an “implicit” definition for the =
operator. So while there is no explicit = operator, there is an implicit one. This implicit
declaration can be hidden by an explicit declaration of = in the same package (LRM Section
10.3). However, if another version of the = operator is declared in a different package than
that containing the enumeration declaration, and both operators become visible through
use
clauses, neither can be used without explicit naming, i.e.,
ARITHMETIC.”=”(left, right)
To eliminate that inconvenience, the VCOM command has the
-explicit
option
that allows the explicit = operator to hide the implicit one. Allowing the explicit
declaration to hide the implicit declaration is what most VHDL users expect.
vcom -work mylib -refresh
The
-work
option specifies
mylib
as the library to regenerate.
-refresh
rebuilds the library
image without using source code, allowing models delivered as compiled libraries without
source code to be rebuilt for a specific release of Model
Sim
(4.6 and later only).
If your library contains Verilog design units be sure to regenerate the library with
vlog
(p83) and
-refresh
as well.
See "Regenerating your design libraries" (p43) for more information.