Technical data

FLI and PLI tracing
486
-
VHDL Foreign Language Interface and Verilog PLI ModelSim EE/PLUS Reference Manual
PLI TF routines and Reason fla
g
s
The most current listing of PLI TF (utility) routines and reason flags supported by
Model
Sim
/PLUS is available on-line. See "Installed technotes" (p28).
FLI and PLI tracing
The foreign interface tracing feature is available for tracing user foreign language
calls made to the MTI VHDL FLI and to the MTI Verilog PLI interface. Turning
on the tracing activates tracing for both interfaces.
Foreign interface tracing creates two kinds of traces: a human-readable log of
what functions were called, the value of the arguments, and the results returned;
and a set of C-language files to replay what the foreign interface side did.
The purpose of tracin
g
files
The purpose of the log file is to aid the user in debugging his FLI and/or PLI code.
The primary purpose of the replay facility is to send the replay file to MTI support
for debugging co-simulation problems, or debugging FLI/PLI problems for which
it is impractical to send the FLI/ PLI code. MTI still would need the customer to
send the VHDL/Verilog part of the design to actually execute a replay, but many
problems can be resolved with the trace only.
In order to properly replay a VHDL FLI trace, you may need to insert a dummy
component into your design. This will be used on replay as the source of the
foreign actions, and as a link to the design ports and generics, but should do
nothing in your original simulation except hold a place in the design hierarchy.
This dummy component is not required for a simple log trace that will not be
replayed, is not needed for replay if your FLI code does not trace the hierarchy of
the design, and is not required for Verilog PLI replay.
See "Installing the dummy component for VHDL trace replay" (p488) below.