Technical data

VSIM function descriptions
ModelSim EE/PLUS Reference Manual VHDL Foreign Language Interface and Verilog PLI
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void mti_Command(char *cmd)
Executes the VSIM command identified by cmd. The string contains the command just as
it would be typed at the VSIM prompt. Echoes results.
typeID mti_CreateArrayType(long left, long right, typeID elem_type)
Creates a new typeID that describes an array type. Left and right specify the bounds of the
array. Elem_type specifies the type of the elements of the array.
driverID mti_CreateDriver(signalID sig)
Creates a driver on a signal. You must create a driver before you can drive a resolved signal.
Multiple drivers may be created for a resolved signal, but no more than one driver can be
created for an unresolved signal. Alternately, an unresolved signal may be driven with
mti_SetSignalValue.
typeID mti_CreateEnumType(long size, long count, char **vals)
Creates a new typeID that describes an enumeration. Count indicates how many values are
in the type. Vals is a pointer to an array of strings that define literals of this type. The
number of elements in the array must equal count. The first element of the array is the
left-most value of the enumerated type.
The size parameter specifies how many bytes of storage that the simulator must
use for values of this type. If count is greater than 256, then size must be 4.
Otherwise, size may be either 1 or 4.
processID mti_CreateProcess(char *name, funcptr func, void *param)
Creates a new process. The first argument is the name that will appear in the VSIM process
window. The function specified will be called at time 0 after all the signals have been
initialized. Use the mti_Sensitize and mti_ScheduleWakeup functions to cause the function
to be called at other times.
regionID mti_CreateRealType()
Returns a type descriptor for the VHDL type REAL.
regionID mti_CreateRegion(regionID reg, char *nm)
Creates a new subregion of name "nm" in the parent region "reg". Returns the regionID for
the new region. The operation is the same for Verilog instances.
typeID mti_CreateScalarType(long left, long right)
Creates a new typeID that describes an integer scalar. The range of valid values is bounded
by “left” and “right”.