Technical data

ModelSim EE/PLUS Reference Manual VHDL Foreign Language Interface and Verilog PLI-
451
12 -
VHDL Foreign Language Interface
and Verilog PLI
Chapter contents
Compiling and linking FLI and PLI applications . . . . . . . . . . 452
Windows NT/95/98 linking. . . . . . . . . . . . . . . 453
SunOS 4 linking . . . . . . . . . . . . . . . . . 453
Solaris linking . . . . . . . . . . . . . . . . . . 453
HP700 linking . . . . . . . . . . . . . . . . . . 454
IBM RISC/6000 linking . . . . . . . . . . . . . . . 454
Using the VHDL FLI with foreign architectures . . . . . . . . . . 456
Declaring the FOREIGN attribute . . . . . . . . . . . . . 456
Using the VHDL FLI with foreign subprograms . . . . . . . . . . 458
Using checkpoint/restore with the FLI . . . . . . . . . . . . . 463
Support for Verilog instances . . . . . . . . . . . . . . . 465
VSIM function descriptions . . . . . . . . . . . . . . . . 467
Using the Verilog PLI . . . . . . . . . . . . . . . . . 483
Specifying the PLI file to load . . . . . . . . . . . . . . 483
Support for VHDL objects . . . . . . . . . . . . . . . 484
PLI ACC routines for VHDL objects . . . . . . . . . . . . 485
PLI TF routines and Reason flags . . . . . . . . . . . . . 486
FLI and PLI tracing . . . . . . . . . . . . . . . . . . 486
The purpose of tracing files. . . . . . . . . . . . . . . 486
Invoking a trace. . . . . . . . . . . . . . . . . . 487
Replaying a Verilog PLI session . . . . . . . . . . . . . 489
This chapter covers Model
Sim
’s VHDL FLI (Foreign Language Interface) and
Model
Sim
’s implementation of the Verilog PLI. The VHDL FLI allows you to
replace a VHDL architecture with code written in C or replace the body of a
VHDL function with code written in C. If you are simulating a Verilog design, the
MTI Verilog PLI provides similar capability for Verilog tasks and functions. Both
interfaces offer routines for mixed VHDL/Verilog simulation.