Technical data

Using the TextIO package
426
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The TextIO Package ModelSim EE/PLUS Reference Manual
Syntax for file declaration
The VHDL’87 syntax for a file declaration is:
file
identifier : subtype_indication
is
[ mode ] file_logical_name ;
where "file_logical_name" must be a string expression.
The VHDL’93 syntax for a file declaration is:
file
identifier_list : subtype_indication [ file_open_information ] ;
If a file is declared within an architecture, process, or package, the file is opened
when you start the simulator and is closed when you exit from it. If a file is
declared in a subprogram, the file is opened when the subprogram is called and
closed when execution RETURNs from the subprogram.
You can specify a full or relative path as the file_logical_name; for example
(VHDL’87):
file
filename : TEXT
is in
"usr/rick/myfile";
Usin
g
STD_INPUT and STD_OUTPUT within Model
Sim
The standard VHDL’87 TextIO package contains the following file declarations:
file
input: TEXT
is in
"STD_INPUT";
file
output: TEXT
is out
"STD_OUTPUT";
The standard VHDL’93 TextIO package contains these file declarations:
file
input: TEXT
open
read_mode
is
"STD_INPUT";
file
output: TEXT
open
write_mode
is
"STD_OUTPUT";
STD_INPUT is a file_logical_name that refers to characters that are entered
interactively from the keyboard, and STD_OUTPUT refers to text that is
displayed on the screen.
In Model
Sim
reading from the STD_INPUT file brings up a dialog box that allows
you to enter text into the current buffer. The last line written to the STD_OUTPUT
file appears as a prompt in this dialog box. Any text that is written to the
STD_OUTPUT file is also echoed in the Transcript window.