Technical data

splitio
ModelSim EE/PLUS Reference Manual Simulator Command Reference
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369
splitio
The
splitio
command operates on a VHDL inout or out port to create a new signal
having the same name as the port suffixed with "__o". The new signal mirrors the
output driving contribution of the port.
Syntax
splitio
[-outalso | -outonly] [-r] <signal_name> ...
Arguments
-outalso
Allows
splitio
to work on out ports as well as inout ports. Optional.
-outonly
Allows
splitio
to work
only
on out ports. Optional.
-r
Specifies that the port selection occurs recursively into subregions. Optional; if omitted,
included ports are limited to the current region.
<signal_name>
...
Specifies the VHDL port. Operates only on inout ports by default; out ports may be
specified with the options above. Separate multiple port names with spaces. Required.
Description
The
splitio
command operates on inout or out ports and silently ignores any other
signals specified. The new signals created may be specified in any
vsim
(p91)
commands that operate on signals. These signals appear to be out ports to the
signal selection options on
vsim
commands. For example,
list -r -out /*
selects all out ports in the design including any signals created by the
splitio
command.