Technical data

GUI_expression_format
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ModelSim EE Graphic Interface ModelSim EE/PLUS Reference Manual
GUI_expression_format
The GUI_expression_format is an option of several VSIM commands that operate
within Model
Sim
’s GUI environment. The expressions allow the use of criteria to
locate and examine HDL items within the List and Wave windows. The
commands that use the expression format are:
•
down | up
(p304)
to search in a List window (you may have more than one List window)
•
examine
(p313)
to observe the value and compute mathematical functions of items in the List
window
•
right | left
(p359)
to search in a Wave window (you may have more than one Wave window)
Expressions may be typed directly on the VSIM command line or you can use the
"The GUI Expression Builder" (p242)
Expression typin
g
GUI expressions are typed. The supported types consist of six scalar types and two
array types.
Scalar types
The scalar types are as follows: boolean, integer, real, time (64-bit integer),
enumeration and signal state. Signal states are represented by the nine VHDL
std_logic states: ’U’ ’X’ ’0’ ’1’ ’Z’ ’H’ ’L’ ’W’ and ’-’. Verilog states 0 1 x and z
are mapped into these states and the verilog strengths are ignored. Conversion is
done automatically when referencing Verilog nets or registers.
Array types
The array types supported are signed and unsigned arrays of signal states. This
would correspond to the VHDL std_logic_array type. Verilog registers are
automatically converted to these array types. The array type can be treated as
either UNSIGNED or SIGNED, as in the IEEE std_logic_arith package.
Normally, referencing a signal array causes it to be treated as UNSIGNED by the
expression evaluator; to cause it to be treated as SIGNED, use casting as described
below. Numeric operations on arrays performed by the expression evaluator are
done using the Model
Sim
’s built-in std_logic_arith (etc.) package routines. The
expression evaluator selects the appropriate numeric routine based on SIGNED or
UNSIGNED properties of the array arguments and the result.