Technical data

Setting default compile options
ModelSim EE/PLUS Reference Manual ModelSim EE Graphic Interface
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193
VHDL compiler options pa
g
e
Flag
Warnings on:
•
Unbound
Component
Flags any
component
instantiation in the
VHDL source code
that has no
matching entity in a
library that is
referenced in the
source code, either
directly or
indirectly. Edit the
Show_Warning1
variable (p416) in
the
modelsim.ini
to
set a permanent
default.
•
Process without
a wait statement
Flags any process
that does not
contain a wait statement or a sensitivity list. Edit the Show_Warning2 variable
(p416) in the
modelsim.ini
to set a permanent default.
•
Null Range
Flags any null range, such as 0 downto 4. Edit the Show_Warning3 variable
(p416) in the
modelsim.ini
to set a permanent default.
•
No space in time literal (e.g. 5ns)
Flags any time literal that is missing a space between the number and the time
unit. Edit the Show_Warning4 variable (p417) in the
modelsim.ini
to set a
permanent default.
•
Multiple drivers on unresolved signal
Flags any unresolved signals that have multiple drivers. Edit the
Show_Warning5 variable (p417) in the
modelsim.ini
to set a permanent default.