Technical data

Structure window
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ModelSim EE Graphic Interface ModelSim EE/PLUS Reference Manual
Structure window
The Structure window provides a hierarchical view of the structure of your design.
An entry is created by each HDL item within the design. (Your design structure
can remain hidden if you wish, see "Source code security and -nodebug" (p534).)
HDL items
y
ou can view
The following HDL items for VHDL and
Verilog are represented by hierarchy within
Structure window.
VHDL items
component instantiation, generate statement,
block statement, and package
Verilog items
module instantiation, named fork, named
begin,
task and function
Within the Structure window, VHDL items
are indicated by a box and Verilog items are
indicated by a circle.You can expand and
contract the display to view the elements by
clicking on the boxes or circles at the left of
the Window. The first line of the Structure
window indicates the top-level design unit
being simulated.