Technical data

Signals window
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ModelSim EE Graphic Interface ModelSim EE/PLUS Reference Manual
Signals window
The Signals window shows the names and values of HDL items in the current
region (which is selected in the Structure window). Items may be sorted in
ascending, descending, or declaration order.
HDL items
y
ou can view
One entry is created for each of the
following VHDL and Verilog HDL
items within the design:
VHDL items
signals
Verilog items
nets, register variables, and named
events
The names of any VHDL composite
types (arrays and record types) are
shown in a hierarchical fashion.
Hierarchy also applies to Verilog nets
and vector memories. (Verilog vector
registers do not have hierarchy
because they are not internally
represented as arrays.)
Hierarchy is indicated in typical
Model
Sim
fashion with plus
(expandable), minus (expanded), and
blank (single level) boxes.
See "Tree window hierarchical view" (p114) for more information.