Technical data

Process window

ModelSim EE Graphic Interface ModelSim EE Tutorial

Process window

The Process window displays a list of processes and indicates the pathname of the

instance in which the process is located.

Each HDL item in the scrollbox is preceded by one of the

following indicators:

•

<Ready>

Indicates that the process is scheduled to be executed within the

current delta time.

•

<Wait>

Indicates that the process is waiting for a VHDL signal or

Verilog net or variable to change or for a specified time-out

period.

•

<Done>

Indicates that the process has executed a VHDL wait statement

without a time-out or a sensitivity list. The process will not

restart during the current simulation run.

If you select a "Ready" process, it will be executed next by the simulator.

When you click on a process in the Process window the following windows are

updated:

Window updated Result

Structure window (p67) shows the region in which the process is located

Variables window (p70) shows the VHDL variables and Verilog register variables in

the process

Source window (p61) shows the associated source code

Dataflow window (p35) shows the process, the signals and nets the process reads, and

the signals and nets driven by the process.