Technical data

examine
ModelSim EE/SE Command Reference ModelSim Commands CR-81
examine
The examine, or exa command, examines one or more HDL items, and displays
current values (or the values at a specified previous time) in the Main window
(10-
158)
. It optionally can compute the value of an expression of one or more items.
The following items can be examined at any time:
• VHDL
signals and process variables
• Verilog
nets and register variables
To examine a VHDL variable, the simulator must be paused after a step command
(CR-151), a breakpoint, or you can specify a process label with the name. To
display a previous value, specify the desired time using the -time option. To
compute an expression, use the -expr option. The -expr and the -time options may
be used together.
Virtual signals and functions may also be examined within the GUI (actual signals
are examined in the kernel).
Syntax
examine
[-time <time>] [-context] [-delta <delta>] [-env <path>] [-expr
<expression>] [-<radix>] [-value] [-name] <name>...
Arguments
-time <time>
Specifies the time value between 0 and $now for which to examine the items. If
an expression is specified it will be evaluated at that time. Optional.
The item to be examined must have been logged using the add list command
(CR-
22)
; the log command (CR-93) is not sufficient.
If the <time> field uses a unit, the value and unit must be placed in curly brackets.
For example, the following are equivalent for ps resolution:
exa -time {3.6 ns} signal_a
exa -time 3600 signal_a
If used, -time must be the first option.
-context
Passes the region to look for signal name. Optional.