Technical data

virtual type
CR-196 ModelSim Commands ModelSim EE/SE Command Reference
virtual type
The virtual type command creates a new enumerated type, known only by the
GUI, not the kernel. Virtual types are used to convert signal values to character
strings.
Syntax
virtual type
{<list_of_strings>} <name>
Arguments
{<list_of_strings>}
A space-separated list of character strings. Required. Each string is associated
with an enumeration index, starting at zero and increasing by one in the positive
direction. There is currently no restriction on the contents of each string, but if
strings contain spaces they would need to be quoted, and if they contain characters
treated specially by Tcl (square brackets, curly braces, backslashes...), they would
need to be quoted with curly braces.
<name>
The user-defined name of the virtual type. Required. Case is not ignored. It is
recommended to use alpha, numeric and underscore characters only, or use VHDL
extended identifier notation, in which case <name> needs to be quoted with
double quotes or with curly braces.
Examples
Examples of virtual types and their use in displaying signals:
virtual type {state0 state1 state2 state3} mystateType
virtual function {(mystateType)mysignal} myConvertedSignal
When myConvertedSignal is displayed in the Wave, List or Signals window, the
string "state0" will appear when mysignal == 0, and "state1" when mysignal ==
1, and "state2" when mysignal == 2, etc.
Signal mysignal may be a VHDL array of std_logic/std_ulogic/bit, or a Verilog
register or vector net, or a VHDL integer.
virtual type {idle reading writing waiting} mystateType
virtual signal {instruction[19:18]} stateDecode
virtual function {(mystateType)stateDecode} myConvertedState
add wave myConvertedState