Technical data

The Simulate a Design dialog box
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ModelSim PE Graphic Interface Getting Started with ModelSim PE
The Simulate a Design dialog box
When you first invoke VSIM you will see the
Simulate a Design
dialog box below.
This dialog box has four tabs to select simulation options:
• The first, labeled
Design
, allows you to select a library and top-level design unit to
simulate.
The second tab, labeled
VHDL,
allows setting of several VHDL-specific options.
• The
Verilog
tab supports Verilog-specific options including control of time and hazard
checking as well as user-defined simulator arguments.
• The fourth tab configures
SDF
(Standard Delay Format) functions.