User`s manual

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MELSEC-Q
9 CONTROL OPERATION INSTRUCTIONS
Block diagram
The processing block diagram of the S.PHPL instruction is shown below.
(The numerals (1) to (5) in the diagram indicate the order of the processing.)
AND
E1
BW
BB2
BB3
RL, RH DPL, CTIM
(1)
(4)
(2)
PHA
PLA
AND
BB1
OR
HS PV
AND
AND
AND
AND
STOP(SPA 1)
SPA
RUN(SPA 0)
(3)
(5)
(5)
HHA
LLA
DPPA
DPNA
OFF
BB4
BB5
LL' HH' PL' PH'
LL HH PL PH
BW
Engineering value reverse conversion
Engineering
value
conversion
Change rate
check
Upper/lower limit check
Loop stop
judgment
Loop stop
processing
ERRI DPPI
ERRI PHI
ERRI PLI
ERRI HHI
ERRI LLI
ERRI DPNI
Upper limit alarm
Lower limit alarm
Upper upper limit alarm
Lower lower limit alarm
Positive
Negative