User`s manual

381
CHAPTER 17 DEDICATED INSTRUCTIONS
17
17.3 ZP.CSET (Programmable Controller CPU Monitoring Register/Cancel)
17.3.4 Errors
(1) When the dedicated instruction is completed abnormally, the error flag (SM0)
turns on and the error code is stored in SD0.
See the following manuals regarding the error code, and check the errors and take corrective actions.
<Error codes>
4FFFH or less: User's manual (hardware design, maintenance and inspection) for the CPU module used
7000H or higher: User's Manual (Basic)
(2) The programmable controller CPU monitoring setting (control data (S2) + 13 to
(S2) + 102) is not checked when the CSET instruction is executed, but when
the designated cycle time elapses.
In the case the monitoring data registered from the Q series C24 is not sent after the CSET instruction is
completed normally and the designated cycle time elapses, check the programmable controller CPU monitoring
function execution result (buffer memory 2205H/2305H) to check the errors, and take corrective actions.