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User`s manual

ManualsBrandsMitsubishi ManualsComputer equipmentQJ71C24/-R2
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CHAPTER 7 DATA COMMUNICATIONS USING DC CODE TRANSMISSION CONTROL
7
7.2 Control Contents of DC Code Control
(a) Q Series C24 DC1/DC3 transmission control and free OS area specification
The control is performed in the same as those described in Page 204, Section 7.1 (1), DTR control. The free
OS area specification are the same as those described in Page 205, Section 7.1 (1) (b).
The Q series C24 transmits DC1 or DC3 to the external device instead of turning the ER (DTR) signal on/off.
For the DC1 and DC3 transmit timing, replace ER (DTR) signal ON/OFF as listed below.
(DTR control) (DC1, DC3 transmission control)
ER (DTR) signal OFF= DC3 transmit: Transmitted when the vacant OS area drops to 64 bytes (default) or less
ER (DTR) signal ON = DC1 transmit: Transmitted when the vacant OS area reaches 263 bytes (default) or
more
Remark
● "Receive data clear" described in the User's Manual (Basic) clears the data stored in the OS area.
● If more data is received when the vacant OS area mentioned above is 0 byte, an SIO error is generated and the data
received until the OS area becomes vacant is ignored. At this time, the SIO LED is turned on. ( User's manual
(Basic))
(b) Q series C24 DC1/DC3 reception control contents
• When the Q series C24 receives DC3 from the external device, it terminates data transmission. The
sequence program cannot read the received DC3 signal.
• When the Q series C24 receives DC1 from the external device, it restarts data transmission. (The Q series
C24 resumes transmission from the data terminated on DC3 reception.) The sequence program cannot read
the received DC1 signal.
• Once DC1 is received, subsequent DC1 are ignored and are removed from the receive data.
● In the DC1/DC3 transmission/reception control, the state of the Q series C24 is as follows at the time of power-on, reset
or mode switching of the CPU, or the UINI instruction execution.
● DC1 is not transmitted to the external device.
• This is the same state as when DC1 was transmitted.
• The same state as when DC1 was received even if DC1 is not received from the external device.
D
C
3
D
C
1
External device
Programmable
controller CPU
Data
Data
D
C
3
D
C
1
External device
Q series C24
Data Data