User`s manual

195
CHAPTER 6 CHANGING THE DATA COMMUNICATIONS MONITORING TIMES
6
6.1 No-reception Monitoring Time (timer 0) Setting
6.1 No-reception Monitoring Time (timer 0) Setting
The no-reception monitoring time (timer 0) is the time for clearing the Q series C24 state when the Q series C24 is
placed into the data receive wait state by trouble in the external device.
The Q series C24 monitors the reception interval in byte units at the start of data reception from the external device
and ends monitoring when the preset last data is received and repeats this operation.
The following explains the no-reception monitoring time (timer 0) operation.
One byte is always handled as 12 bits in the no-reception monitoring time (timer 0), regardless of the transmission
setting.
If the non-reception monitoring time (timer 0) was changed in the sequence program, execute any of the following to
enable the changed value.
Mode switching ( Page 345, CHAPTER 15)
UINI instruction ( Page 369, CHAPTER 17)
Programmable controller CPU information clear ( User's Manual (Basic).)
(1) Q series C24 operation by no reception monitoring time (timer 0)
Monitors the receive interval in byte units and returns the elapsed time to 0 each time one byte is received.
At time-out, the Q series C24 performs the following processing.
(a) Data communication using MC protocol
Stores the error code to the MC protocol transmission error code storage area (buffer memory addresses
25AH, 26AH) for the target interface.
Transmits a NAK message to the external device and enters the command message receive wait state.
(b) Data communications using non procedure protocol (Format 0)
Data communications not using user frames
Passes the receive data up to time-out to the Q series C24.
Stores the error code to the data receive result storage area (buffer memory addresses 258H, 268H) for
the target interface and turns on the reception abnormal detection signal (X4, XB) and waits to receive the
next data.
Receiving according to the received complete code (Received complete code: CR + LF (0D0AH))
When the LF is not received within the set time for timer 0 after reception of the CR, the abnormal
reception detection signal to the programmable controller CPU turns ON and the received data at the CR
is stored in the received data storage area of the buffer memory.
External
device
Programmable
controller CPU
Data 1
Monitoring
time
Elapsed time reset
Data 2 Data n-1 Data n
Data receive interval
(depends on the transmission rate, etc.)
1 byte