Specifications

19PROFINET Controller ME1PN1FW-Q
(c) 2013 MITSUBISHI ELECTRIC CORPORATION
Access to Output Data
The following procedure must be followed, if the ‘Output consistency flag’ corresponding to the stati-
on is set.
Cycle 1:
1. The PLC CPU detects that the output buffer is free because values of the handshake flags are
equal (0:0 for cycle 1)
2. The PLC CPU writes the output data to the OUTPUT_DATA buffer
3. The PLC CPU toggles its handshake flag (0 -> 1 for cycle 1)
4. The PROFINET Controller detects that the values of the handshake flags are different
5. The PROFINET Controller reads the output data from the OUTPUT_DATA buffer
6. The PROFINET Controller signals that the output buffer is free by toggling its bit to equal the one
of the PLC CPU (0 -> 1 for cycle 1)
7. The cycle 1 is completed
Cycle 2:
1. The PLC CPU detects that the output buffer is free (1:1 in handshake flags)
2. The PLC CPU writes the output data to buffer memory
3. The PLC CPU toggles its handshake flag (1 -> 0 for cycle 2)
4. The PROFINET Controller detects that the values of the handshake flags are different