Specifications

Process Images Appendix
Quick Start Guide for the MELSEC STlite Series A - 17
A.1.7 Counter module STL-C100 (ID number 51244881)
Using the counter module STL-C100, a 5 byte input and output process image can be transferred to
the head station via two logical channels.
The transfer of the setting counter value in binary format is made via 4 output bytes (D0 to D3) and the
transfer of the counter reading in binary format is made via 4 input bytes (D0 to D3). The control byte
C0 serves for setting the counter and the outputs. The status byte S0 shows the status of the counter
and the inputs and outputs.
Status byte S0
* For a description of bits 4 and 5 of the status byte, please refer to the description of the bits 4 and 5 of the control byte on
the next page.
Input data Output data
S0 Status byte S0 C0 Control byte C0
D0 Counter value, byte 0 (LSB) D0 Set value, byte 0 (LSB)
D1 Counter value, byte 1 D1 Set value, byte 1
D2 Counter value, byte 2 D2 Set value, byte 2
D3 Counter value, byte 3 (MSB) D3 Set value, byte 3 (MSB)
Tab. A-17: Input and output bytes of the STL-C100
NOTE The representation of the process data of some I/O modules in the process image depends on the
fieldbus head station used.
Please take this information as well as the particular design of the respective control/status bytes
included in the description concerning the process image of the corresponding head station.
Fig. A-19: Status byte S0 of the STL-C100
b7 b6 b5 b4 b3 b2 b1 b0
0/10/10/10/10/10/1XXStatus byte S0
Actual signal at input CLOCK
Actual signal at input U/D
Actual signal at output Y1
Actual signal at output Y2
Counter is locked*
Counter is set*
This value is not evaluated.
This value is not evaluated.