Specifications

Ethernet Head Station STL-ETH1 (Ethernet)
4 - 10
MITSUBISHI ELECTRIC
Allocation of the Input and Output Data
● Digital input modules
Digital input modules supply one bit of data per input to specify the signal state for the corre-
sponding input. These bits are mapped into the Input Process Image.
When analog input modules are also present in the node, the digital data is always appended
after the analog data in the Input Process Image, grouped into bytes.
● Digital output modules
Digital output modules use one bit of data per output. These bits are mapped into the Output
Process Image.
When analog output modules are also present in the node, the digital image data is always
appended after the analog data in the Output Process Image, grouped into bytes.
NOTE
For the meaning of input and output bits or bytes of the connected STlite modules please refer to
the corresponding I/O module description in the appendix of this manual.
Type of module Name ID number Description
Process Image [Bit]
Input Output
Digital input
modules
STL-DI8-V1 51205052 8 inputs for source type sensors, 24 V DC 8 0
STL-DI8-V2 51205053 8 inputs for source type sensors, 24 V DC 8 0
Tab. 4-4: Process data of digital input modules
Input Process Image
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Input X7 Input X6 Input X5 Input X4 Input X3 Input X2 Input X1 Input X0
Tab. 4-5: Input process image of digital input modules with 8 inputs
Type of module Name ID number Description
Process Image [Bit]
Input Output
Digital output
modules
STL-DO4 51205045
4 transistor outputs, 24 V DC, 0.5 A,
source type
04
STL-DO8 51205043
8 transistor outputs, 24 V DC, 0.5 A,
source type
08
STL-RO2 51205044
2 relay outputs 230 V AC / 30V DC,
500 VA/60 W
02
Tab. 4-6: Process data of digital output modules
Output Process Image
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Output Y3 Output Y2 Output Y1 Output Y0
Tab. 4-7: Allocation of data for the digital output module STL-DO4
Output Process Image
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Output Y7 Output Y6 Output Y5 Output Y4 Output Y3 Output Y2 Output Y1 Output Y0
Tab. 4-8: Allocation of data for the digital output module STL-DO8