Specifications

Q4ARCPU Redundancy
10
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Hot/Stand-by operation
The Q4ARCPU’s dual CPU system provides hot/stand-by
operations for PLCs. When the hot CPU is operating
normally, all the I/O modules are controlled by the hot
CPU. During that time, the stand-by CPU does not execute
its program, but copies the internal device data of the hot
CPU. If the operation of the hot CPU becomes abnormal,
the stand-by CPU starts operations based on the most recent
data it copied from the hot CPU and control of the system
is resumed.
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Data tracking
In order to resume operations either some or all of the
internal device memory is copied to the stand-by CPU from
the hot CPU, an operation called ‘data tracking.’ With data
tracking, data of up to 48k words for a single scan and a
greater amount for multiple scans is copied.
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Program tracking
The programs in both CPUs have to be exactly the same,
which means that when you first download a program it
must be downloaded on both CPUs. Any revision, however,
carried out to a program of the hot CPU during operation
will be automatically copied to the stand-by CPU.
Note: Changes made to the stand-by CPU during operation
will result in a stand-by CPU error, though the hot CPU will
carry on in its operations despite it.
When switchover of the system occurs, the stand-by CPU
resumes program execution based on the data from the
most recent data tracking in order to ensure no data is lost.
Because the reliability of tracked data is very important, the
tracking circuitry has a parity check to ensure it. If any
errors in the data are found, the stand-by CPU will reject
the data and signal an alarm.
Data tracking
Hot CPU
execution
Step 0 END Step 0 END
Step 0 END
Step 0
Stand-by CPU
execution
Data tracking
Parity
check
circuit
Device
memory
Device
memory
Tracking
memory
Parity
check
circuit
Hot CPU Stand-by CPU
Note: Local devices cannot be assigned as tracking data.
Note: The data tracking area must be set by the user.
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Control switchover
Control of the system will be switched over if any of the
following errors is detected.
●
AS92R detects any error related to the CPU, power supply,
or to AS92R itself. (Refer to the items monitored by
AS92R.)
●
The network module is disconnected from
MELSECNET/10 communications.
●
The bus change request key switch located on A6RAF is
activated.
If any of the above conditions, except for network module
disconnection, is detected, the system will switch over
within 300 msec. (The amount of time varies depending on
the size of data tracking.) If a network disconnection is
detected, system switchover will be complete within 3 sec.
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Process control commands
In addition to the standard command set available in other
QnACPUs, the Q4AR has 47 process control commands. The
additional commands include various PID and PID related
commands, compensation calculations, logical calculations,
and comparisons. PID calculations are carried out with
floating point values so the calculations are highly accurate.
These features make the Q4ARCPU compatible with process
control applications.
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Restrictions on modules for use with
the Q4AR system
Prohibited from use:
With single Q4AR system With dual Q4AR system
AJ71C23 Modules listed left
AD57-S2 AJ71AP21(-S3)
AJ71C24 (S/W Ver. G or earlier) AJ71AP21GE, AJ71AR21
AJ71P25, AJ72R25
AD51 (S/W Ver. G or earlier) AJ71AT21B
A7GT-BUS (Ver. B or earlier) AJ72T25B
AJ71LP21, AJ71BR11 AJ71QL21 (S), AJ71BR11
AJ72LP25, AJ72BR15 (S/W Ver. G or earlier)
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