System information

REV 4.0.
48
4.2.16. Iepllh (PLL hold end)
Function: PLL hold end position setting in analog input signal. The execution result is saved in
input memory by Reginp command execution.
Effective models and inputs: ANALOG of model group A, B and S.ANALOG of all models
Format: ID Iepllh [ _ End ]
PLL hold end position
0 – 31 PLL hold end position
End
Omitted Current setting value display
Response: ID Iepllh _ end
Current PLL hold end position
0 – 31 Current PLL hold end position
?00 Invalid parameter
end
?01 Execution failure
4.2.17. Ifilter (Filter)
Function: Sharpness setting in video signal of the input board (VC-B20KV / VC-B50KV). The
execution result is saved in input memory by Reginp command execution.
Effective inputs: COMPOSITE, Y/C
Format: ID Ifilter [ _ Data ]
Sharpness setting value
-8 – 8 Sharpness setting value
Data
Omitted Current setting value display
Response: ID Ifilter _ data
Current sharpness setting value
-8 – 8 Current sharpness setting value
?00 Invalid parameter
data
?01 Execution failure
4.2.18. Ifine (Fine Delay)
Function: Fine sync setting in analog input signal to adjust sampling clock phase with A/D
converter. The execution result is saved in input memory by Reginp command execution.
Effective inputs: ANALOG, S.ANALOG
Format: ID Ifine [ _ Phase ]
Sampling clock phase setting value
-16 – 15 When ANALOG input port is selected.
-32 – 31 When S.ANALOG input port is selected.
Phase
Omitted Current setting value display
Response: ID Ifine _ phase
Current sampling clock phase setting value
-16 – 15 When ANALOG input port is selected.
-32 – 31 When S.ANALOG input port is selected.
?00 Invalid parameter
phase
?01 Execution failure